What this call funds
Scope
Proposals innovations should address one or more of the several domains :
- WBG substrates to reduce EU dependency on material and provide more sustainable, industrially compatible solutions.
- WBG platform for cost effectiveness, available in 300mm for GaN and/or SiC to improve yield and power density and close gaps in the value chain.
- A toolbox (e.g. wafer cut, smart stacking, thin layer transfer, epitaxy, UWBG materials) for further innovation schemes.
- Next generation or optimised new power semiconductor devices fitting their application.
- Adding intelligence to power semiconductor devices on control and/or sensor side.
- Facilitate the propagation of EU Packaging/Integration excellence along the entire value chain e.g. pre-packages or power semiconductor device packaging solutions to enable power device/system integration and strengthen Europe’s competitiveness in advanced packaging.
- Explore the use of heterogeneous and functional integration for improved performance, reliability, robustness and cost competitiveness. Rising operative voltage, frequency, current and thermal features that are common challenge on power electronics across the different application sectors. Provide stable and clean power supply that minimises disruptions, equipment failures, and data corruption.
- Advanced characterization techniques for new materials, devices, and systems.
- Implement AI at system level and/or make use of AI methods to increase the innovation speed.
Eligibility & conditions+
General conditions
1. Admissibility conditions: Proposal page limit and layout
Proposal page limits and layout: detailed in Part B of the Application Form, which you can access from the Call documents section on the Chips JU website's Call page
The following information are all described in the Appendix 7 of the Chips JU Workprogramme
2. Eligible countries
3. Other Eligibility Conditions
4. Financial and operational capacity and exclusion
5a. Evaluation and award: Award criteria, scoring and thresholds
5b. Evaluation and award: Submission and evaluation processes
5c. Evaluation and award: Indicative timeline for evaluation and grant agreement
6. Legal and financial set-up of the grants
Specific conditions
Please visit the Chips JU website's Call page
Calls documents
Please refer to the calls documents section on the Chips JU website's Call page to view and download all required documents and templates.
Specific documents
2026 Guide for Applicants RIA_IA_FT-FPP
Evaluation Form Chips IA RIA FT-FPP
Template Application form Part B IA-RIA-FT FPP
Ownership Control Declaration form template
National Budgets Table template (xls)
General documents
Chips JU Multiannual Work Programme
Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026
PAB decision on the evaluation and selection procedures related to Calls for Proposals
ECS Strategic Research and Innovation Agenda
Rules for legal entity validation, LEAR appointment, financial capacity and ownership control assessment
Annotated Model Grant Agreement for EU Funding Programmes 2021-2027
Application and evaluation forms and model grant agreement (MGA):
Model Grant Agreements (MGA)
HE MGA
Call-specific instructions
Information on financial support to third parties (HE)
Information on clinical studies (HE)
Additional documents:
EU Financial Regulation 2024/2509
EU Grants AGA — Annotated Model Grant Agreement
Funding & Tenders Portal Online Manual
Funding & Tenders Portal Terms and Conditions
Funding & Tenders Portal Privacy Statement
Source: EU Funding & Tenders Portal · synced 2026-07-07